1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor element and a design method thereof. In addition, the invention relates to a semiconductor device (hereinafter, referred to as “ID tag”) in which data communication is possible by wireless communication.
2. Description of the Related Art
In recent years, a semiconductor device having a semiconductor element is applied to various fields, and research and development thereof are promoted. A semiconductor device comprises a plurality of conductive layers 11, a first element group 12 having a selecting function, and a plurality of second element groups 13 each having an amplifying function on a substrate 10 having an insulating surface (FIG. 11). Ordinarily, a region where the conductive layers 11 are formed is disposed in the middle of the substrate 10, and a region 14 where the first element group 12 is formed is disposed on one side among the left, right, top and bottom of the region where the conductive layers 11 are formed. Second regions 15, 16, 17 and 18 where the second element groups 13 are formed, respectively, are disposed opposing to the region where the conductive layers 11 are formed with the region 14 interposed therebetween.
Note that the region 14 where the first element group 12 is formed is split into a plurality of element formation regions 95 correspondingly to the number of the conductive layers 11. Usually, a pitch 19 in rows of the element formation region 95 is same as a pitch 20a between the conductive layers 11. In addition, the conductive layers 11 take a role in transmitting a signal, and specifically, they take a role such as transmitting a signal supplied from a driver and a controller to an element, or transmitting a signal read from an element to other units such as an amplification unit.
The above structure shows that the conductive layers 11 are connected to the second element arrays 13 through the first element arrays 12. In other words, the conductive layers 11 intersect the first element arrays 12 and it is connected to the second element arrays 13. Then a parasitic capacitance is generated between the first element arrays 12 and the conductive layers 11. This parasitic capacitance becomes a load and therefore signal transmission with the conductive layers 11 delays.